The primary goal of this project is to acquire the necessary experimental data and perform calculations to develop theoretical models to elucidate the predominate mechanisms of absorption for mm and sub-mm electromagnetic waves in ultra-low-loss semiconductors, especially CVD diamond and SiC, which are among the most promising low-loss materials available.
The evaluation of such very low loss materials in the millimeter-wave region requires precision measurement of the change in the linewidth of a resonant cavity when a sample is inserted. The precision required is on the order of a few kHz change in a 300 kHz line-width. We have achieved this precision by installing a simple and relatively inexpensive, phase-locked loop (PLL) to stabilize the BWO frequency and synchronize it with the analyzer’s local oscillator (LO). This newly developed system is shown on schematic on figure 1, which is located in the activities section of this report.
In order to analyze and optimize the performance of the system, an analytical model of the fourth order phase-locked loop was used, as shown in Fig. 2.
The IF signal is divided by a pre-scaler in the ADF4007 chip using N=64. Another prescaler divides the reference signal by 2. The PFD then compares the phase of the two signals. Any phase error causes a correction signal to be generated by the CP. The PFD includes a fixed, 3 ns delay element that controls the width of the anti-backlash pulse. This pulse ensures that there is no dead zone in the PFD transfer-function and minimizes phase noise and reference spurs.
The charge pump delivers current i for tp seconds to the loop filter. This charge pump current creates a control voltage across the loop filter impedance. The control voltage is then used as negative feedback to adjust theBWO frequency/phase for phase-lock.
Fig. 2. Analytical model of the phase-locked BWO.
Fig. 3. Diagram of the voltage controlled BWO.
Design of the loop filter impedance, Zf, permits specialization of the general charge pump to the desired performance. We chose the third order type-2 filter shown in Fig. 3, whose impedance can be written as
Fig. 4. Simulated closed loop frequency response with 51.7 phase margin.
During a typical measurement, a span of 2 MHz is swept in1 s, using 2 KHz steps, hence we design the lock-time of the PLL to be < 200 s for a 2 kHz step to 100 Hz of final frequency. After some experimentation, we found optimum performance using a CP current of Ip= 9.236 mA. The frequency response of the closed loop gain for this design, as simulated by ADISimPLL3.0, was shown in Fig. 4.
The complete PLL-BWO system was assembled and connected according to block diagram in Fig. 1 (located in the activities section of this report). Communication via the GPIB interface was used to create a virtual instrument on the computer display. We compiled the control and measurement program by Labview8.5, the response curve of the empty open resonator was shown in Fig. 5. The computer-controlled data collection protocol acquires ten sequential scans and transfers them to the computer. Acquisition and transfer of ten scans requires 20 s. Computer analysis converts dBm to nanowatts, and performs a non-linear least squares fit to a Lorentzian line shape. The data fitting consists of finding the coefficients of this function for each scan.
Fig. 5. Resonance curve for an empty open resonator with 0.5 mil Teflon beam splitter (Span 2 MHz, resolution10 kHz, total points: 1000).
The resulting line-widths are averaged to obtain the mean and standard deviation. Standard deviations are typically on the order of 1%. This accuracy has enabled measurements of the loss tangent with a typical standard deviation of 5% for samples with extremely low loss. For example, we have measured production wafers of high-purity, semi-insulating (HPSI) SiC having a typical thickness of 0.35 mm and a typical loss tangent of (5.1 ± 0.2)x10-5. Other researchers have reported errors in the range of 5% to 10% for similar materials.
TABLE I - LINE WIDTH MEASUREMENT RESULT